The developments discussed hereafter are based on the specific case of microbolometer-type heat detectors, in that they especially benefit from the advantages provided by the invention. It should however be specified that the issues expressed in this context apply to any type of device generating electric charges to be measured. In particularly, what is described hereafter applies to all electromagnetic radiation detectors, be they detectors operating, for example, in the visible range, or detectors operating in infrared or beyond in so-called “Terahertz” bands. Similarly, the invention benefits to detectors sensitive to electromagnetic waves, such as heat detectors, for example, of bolometric and capacitive type, or to coupling antennas for the thermal and Terahertz ranges, as well as to so-called quantum detectors, sensitive to electromagnetic energy corpuscles, including detectors operating from as soon as the X, UV, visible, and infrared bands.
In the context of the present invention, term “detector” may be understood as designating any system intended to generate an electric signal in relation with a unit, linear, or two-dimensional distribution of a phenomenon.
In the field of so-called “thermal” infrared detectors, it is known to use one-dimensional or two-dimensional arrays of elements sensitive to infrared radiation, capable of operating at ambient temperature, that is, requiring no cooling at very low temperatures, conversely to detection devices called “quantum detectors”, which require an operation at very low temperature, typically that of liquid nitrogen.
A thermal infrared detector conventionally uses the variation of a physical quantity of a so-called “thermometric” or “bolometric” material, according to its temperature. Most currently, this physical quantity is the electric resistivity of said material, which is strongly temperature-dependent. The unit sensitive elements of the detector, or “bolometers”, are usually in the form of membranes, each comprising a layer of a thermometric material, and suspended above a substrate, generally made of silicon, via support arms having a high thermal resistance, the array of suspended membranes being usually called “retina”. Such membranes especially implement a function of absorption of the incident radiation, a function of conversion of the power of the absorbed radiation into thermal power, and a thermometric function of conversion of the generated thermal power into a variation of the resistivity of the thermometric material, such functions being implementable by one or a plurality of distinct elements. Further, the support arms of the membranes are also conductive and connected to the thermometric layer thereof. Means for sequentially addressing and biasing the thermometric elements of the membranes and means for forming electric signals usable in video formats are usually formed in the substrate having the membranes suspended thereabove. The substrate and the integrated means are commonly called “read-out circuit”.
To compensate for the temperature drift of the detector, a solution generally implemented is to arrange, in the electronic circuit for forming the signal in relation with the temperature of the imaging bolometers (thus called since they are sensitive to the incident electromagnetic radiation), an element for compensating the focal plane temperature (FPT), itself bolometric, that is, having its electric behavior following the substrate temperature, but remaining essentially insensitive to radiation. This result is for example obtained by means of bolometric structures provided, by construction, with a lower thermal resistance towards the substrate, and/or by masking these structures behind a shield opaque to thermal radiation. The use of such compensation elements further has the advantage of eliminating most of the so-called common-mode current originating from imaging or “active” bolometers.
FIG. 1 is an electric diagram of a bolometric detector 10 with no temperature regulation, or “TECless” detector of the state of the art, comprising a common-mode compensation structure, and FIG. 2 is an electric diagram of a circuit used to form a read-out signal of a bolometer of the compensated common-mode detector. Such a detector is for example described in document: “Uncooled amorphous silicon technology enhancement for 25 μm pixel pitch achievement”; E. Mottin et al, Infrared Technology and Application XXVIII, SPIE, vol. 4820E.
Detector 10 comprises a two-dimensional array 12 of identical unit bolometric detection elements 14, or “pixels”, each comprising a sensitive resistive bolometer 16 in the form of a membrane suspended above a substrate, such as previously described, having electric resistance Rac.
Each bolometer 16 is connected by one of its terminals to a constant voltage VDET, especially the ground of detector 10, and by its other terminal to a MOS biasing transistor 18 operating in saturated state, for example, an NMOS transistor, setting voltage Vac across bolometer 16 by means of a gate control voltage GAC.
If A designates the node corresponding to the source of MOS 18 and if VA is the voltage at this node, which depends on gate voltage GAC, voltage Vac is then equal to Vac=VA−VDET. Pixel 14 also comprises a selection switch 20, connected between MOS transistor 18 and a node S provided for each column of array 12, and driven by a control signal Select, enabling to select bolometer 16 for the reading thereof. Transistor 18 and switch 20 are usually formed in the substrate under the influence of the membrane of bolometer 16. Elements 16 and 18 form a so-called detection branch. Particularly, since the pixels are identical and voltage VDET, on the one hand, and voltage GAC, on the other hand, are identical for all pixels, bolometers 16 are thus voltage-biased under the same voltage Vac. Further, gate voltage GAC being constant, voltage Vac is thus also constant.
Detector 10 also comprises, at the foot of each column of array 12, a compensation structure 22, also usually called “skimming” structure. As previously described, the value of the electric resistance of detection bolometers 16 is mainly dictated by the substrate temperature. The current flowing through a detection bolometer 16 thus comprises a significant component which depends on the substrate temperature and is independent from the observed scene. Compensation structure 22 has the function of delivering an electric current for purposes of partial or total compensation of this component.
Structure 22 comprises a compensation bolometer 24, of electric resistance Rcm, made insensitive to the incident radiation originating from the scene to be observed. Bolometer 24 is constructed by means of the same thermometric material as bolometer 16, but has a very low thermal resistance towards the substrate. For example:                the resistive elements of compensation bolometer 24 are directly formed in contact with the substrate, or        bolometer 24 comprises a membrane similar to that of detection bolometers 16 suspended above the substrate by means of structures having a very low thermal resistance, or also        compensation bolometer 24 comprises a membrane and support arms substantially identical to those of detection bolometers 16 and a material which is a good thermal conductor fills the space between the membrane of bolometer 24 and the substrate.        
The electric resistance of bolometer 24 is thus essentially dictated by the substrate temperature, bolometer 24 then being said to be “thermalized” to the substrate.
Bolometer 24 is connected at one of its terminals to a positive constant voltage VSK, and compensation structure 22 further comprises a MOS biasing transistor 26 operating in saturated state, having a polarity opposite to that of transistors 18 of detection pixels 14, for example, a PMOS transistor, setting voltage Vcm across bolometer 24 by means of a gate control voltage GCM, and connected between the other terminal of compensation bolometer 24 and node S.
Calling B the node corresponding to the drain of MOS transistor 26 and VB the voltage at this node, voltage Vcm is then equal to Vcm=VSK−VB. Elements 24 and 26 form a so-called compensation branch common to each column.
The value of the common-mode compensation current is defined by the value of resistance Ron of bolometer 24 and of the biasing parameters thereof.
Detector 10 also comprises, at the foot of each column of array 12, an integrator 28 of CTIA type (“Capacitive TransImpedance Amplifier”), for example comprising an operational amplifier 30 and a single capacitor 32 of fixed capacitance Cint connected between the inverting input and the output of amplifier 30. The inverting input and the non-inverting input thereof are further respectively connected to node S and to a positive constant voltage VBUS. Voltage VBUS thus forms a reference for the output signals, and is between VDET and VSK. A switch 34 driven by a signal Reset is also provided in parallel with capacitor 32, for the discharge thereof. The outputs of CTIAs 28 are eventually for example connected to respective sample-and-hold circuits 36 for the delivery of voltages Vout of CTIAs in multiplexed mode by means of a multiplexer 38 towards one or a plurality of series output amplifier(s) 40. It may also be integrated at the output of the digitizing means by analog-to-digital converters (ADC).
Finally, detector 10 comprises a sequencing unit 42 controlling the different previously-described switches.
In operation, array 12 is read out line by line. To read from a row of array 12, switches 20 of the line of pixels 14 are turned on and switches 20 of the other lines are turned off. The successive reading of the assembly of lines of array 12 forms a frame.
For the reading of a bolometer 16 of a line of array 12 selected for the reading, after a phase of discharge of the capacitors of the CTIAs at the foot of the column, achieved by the turning on of switches 34 by means of signal Reset, followed by their turning off, a circuit such as shown in FIG. 2 is thus obtained for each pixel in the line being read.
A current Iac flows through detection bolometer 16 of the pixel under the effect of its voltage biasing by MOS transistor 18, and a current Icm flows through compensation bolometer 24 of the compensation structure under the effect of its voltage biasing by MOS transistor 26. These currents are subtracted from each other at node S, and the resulting current difference is integrated by CTIA 28 during a predetermined integration period Tint. Output voltage Vout of CTIA 28 thus is a measurement of the variation of the resistance of detection bolometer 16 caused by the incident radiation to be detected since the non-useful part of current Iac depending on the substrate temperature is at least partly compensated for by current Icm specifically generated to reproduce this non-useful part.
Assuming that the electric resistances of active bolometer 16 and of compensation bolometer 24 are not significantly modified on biasing thereof by a self-heating phenomenon, and that CTIA 28 does not saturate, output voltage Vout of the integrator at the end of integration time Tint can be expressed by relation:
                              V          out                =                                            V              bus                        +                                          1                                  C                  int                                            ⁢                                                ∫                  0                                      ΔT                    int                                                  ⁢                                                      (                                                                  i                        ac                                            -                                              i                        cm                                                              )                                    ⁢                                                                          ⁢                                      ⅆ                    t                                                                                =                                                                      (                                                            i                      ac                                        -                                          i                      cm                                                        )                                ·                                  T                  int                                                            C                int                                      +            VBUS                                              (        1        )            
As known per se, a CTIA has a fixed electric output dynamic range or “read-out” dynamic range. Below a first quantity of electric charges received as an input, the CTIA supplies a low fixed voltage, called “low saturation voltage” (VsatL). Similarly, above a second quantity of electric charges received as an input, the CTIA supplies a high fixed voltage, called “high saturation voltage” (VsatH). Relation (1) expresses the linear behavior of the CTIA, when it receives a quantity of electric charges greater than the first quantity of electric charges, and smaller than the second quantity of electric charges. The read-out dynamic range is essentially determined by the value of capacitance Cint of capacitor 32. Particularly, when this capacitance is fixed, that is, constant along time, the read-out dynamic range of the CTIA is also fixed.
By convention, in the context of the invention, low and high saturation voltages VsatL and VsatH are the limits between which the CTIA supplies an output considered as linear, even if it is generally capable of supplying lower or higher voltages than these terminals.
Further, the integration capacity also determines the sensitivity, or more exactly the responsivity of the detector. The responsivity of a detector is defined by the variation of output signal Vout in relation with the variation of the input signal (scene temperature Tscene), that is, dVout/dTscene. The observable dynamic range of the scene, or “scene dynamic range” is defined by the maximum temperature difference in a scene which causes no saturation of the output signals of the CTIAs or, in other words, the difference between the highest temperature inducing no high saturation of the CTIAs and the lowest temperature inducing no low saturation of the CTIAs. The sensitivity (responsivity) of a detector accordingly is the ability thereof to detect the details of a scene, while the scene dynamic range of the detector is its ability to transcribe with no distortion very large temperature variations in a scene. It is thus impossible to simultaneously optimize these two contradictory quantities with a fixed integration capacity.
The state of the art thus provides favoring one or the other of these quantities according to the targeted application. Usually, the user either chooses a high sensitivity, and the observable scene dynamic range is necessarily decreased, for example, to a few tens of degrees, or a high scene dynamic range, for example, 200° C., and the detector only has a low sensitivity whatever the observed scene. In other words, the user adjusts the operating point of the detector to respond at best to its need in terms of tradeoff between the sensitivity and the scene dynamic range.
The above considerations apply to any system forming an electric input signal current Iin, an example of which is above-described difference iac−icm, intended to be “read out” by means of an integrator, particularly of CTIA type. In this wide context, the inherent antagonism between the need for a high dynamic range acceptable at the input (here, at the level of the thermal scene) and the contradictory need for a high gain of the signal-forming chain which defines the system sensitivity, in particular the integrator gain dVout/dIin=Tint/Cint.
Complex layouts have been provided to adapt the read-out dynamic range of an integrator to the quantity of electric charges that it receives. In the context of an application to detection, this enables to extend the scene dynamic range while keeping a high sensitivity.
Thus, document Proc. of SPIE Vol. 6940, 694020, (2008) provides arranging in parallel two selectable capacitors instead of single capacitor 32, a capacitor having a low capacitance and a capacitor having a high capacitance. For the reading from the array of unit detectors, a so-called “combined mode” is implemented. This mode alternates the forming of a frame with a high gain by the selection of the capacitors of low capacitance for the CTIAs, and thus of high sensitivity, followed by the forming of a frame with a small gain by the selection of the capacitors of high capacitance for the CTIAs, and thus with a high scene dynamic range.
The defect of this operating mode is a limitation of the availability of high rate data in real time. Indeed, only one frame is displayed for three read frames. The frame frequency is thus equal to one third of the usual frame frequency.
Document Proc. of SPIE Vol. 6542, 65421R, (2007) describes an array detector similar to that previously described. It however differs by a variable integration time according to the position of the pixels. In particular, a long integration time is applied to one pixel, and a shorter integration time is applied to a pixel next to the first pixel, the space distribution of the integration times being applied to the entire array according to a tablecloth pattern. Once a frame has been read with the different integration times, a logic sequencer compares the signal originating from the pixel with a threshold. When the voltage originating from a pixel read with a high gain, that is, with the high integration time, exceeds the threshold, this voltage is replaced in the frame by the average of the voltages originating from the neighboring pixels read with a low gain, that is, with the short integration time. However, when the voltage originating from a pixel read with a low gain is below the threshold, this voltage is replaced in the frame by the average of the voltages originating from the neighboring pixels read with the high gain. One can easily imagine the significant loss of information, particularly relating to high and low temperatures details since the modified frame is an average.
Document WO 2007/135175 describes a circuit for resetting the pixels of an image sensor, provided with CTIAs for reading out the electric charges generated by the unit detection elements. During the integration time, the output voltage of each CTIA is successively sampled three times at three fixed moments:                the first sampled voltage is used to suppress the switching noise (called “kTC noise”) of the two other acquired voltages, via a correlated double sampling device (called “CDS”);        the second voltage enables to capture the details of the scene; and        the third voltage enables to manage a strong scene dynamic range.        
The voltages thus obtained are then digitized and processed by means of a complex algorithm which applies a gain to the last two voltages once their kTC noise has been corrected, and which chooses which one will be provided at the output to avoid saturations and provide a maximum dynamic range.
This solution consumes significant software and memory means due to the subsequent processing of the necessary information, external to the image sensor, and of the signal-forming means. Further, this solution supplies output information shifted in time with respect to the events of the scene, due to the multiple sampling and to the time dedicated to the associated calculations. This defect is called “time inconsistency” or asynchronism.
Document U.S. Pat. No. 7,202,463 describes an image sensor comprising photodiodes. For the reading of each photodiode, a capacitor connected in parallel therewith which integrates the electric charges generated by the photodiode is provided. A comparator is connected to the capacitor to compare the voltage thereof with a threshold voltage and a capacitor discharge circuit, connected at the comparator output, discharges the capacitor when its voltage is greater than the threshold voltage. Finally, a circuitry also provided to count the number of times that the threshold voltage is exceeded by the capacitor voltage during the integration period. The final signal is then restored by multiplying the threshold voltage by the number of counted times, to which the final value of the sensor capacitor voltage is added. This system provides a high scene dynamic range, but due to the repeated discharge of the integration capacity, the final signal is tainted with significant noise, all the higher as the number of discharges of the capacitor is high.